-74813b3e17f460286df-1798 20220523063927112 beie:beie director@blueeyesintelligence.org WEB-FORM International Journal of Recent Technology and Engineering (IJRTE) IJRTE 22773878 10.35940/ijrte.2277-3878 https://www.ijrte.org/ 11 30 2019 8 4 Faculty in Department of Information Technology, Mizoram University, Aizawl, Mizoram, India. Vanlalmuansangi Khenglawt* Zonunmawii Faculty in Department of Electronics and Communication Engineering, Mizoram University, Aizawl, Mizoram, India. Vanlalhruaia Faculty in Department of Computer Engineering, Mizoram University, Aizawl, Mizoram, India. With the increasing levels of transistor count and clock rate of microprocessors there is a significant increase in power dissipation. Reducing power consumption in both high power consumption and high performance has developed into one of the main target in designing a system for various devices. As the chip multiprocessor (CMP) are integrating more cores on the die, it will leads to the extent of Large scale CMP (LCMP) architectures with potentially hundreds of thread on the die and thousands of cores. Therefore, we proposed an approach of OS level power optimization in LCMP to optimize the heat dissipation rate and increase computing power under some considerations. To satisfy the main goal of our work, the heat dissipation should be optimizing with increase in computing power. The approach of optimizing the heat dissipation is done at the synthesis level. There are three approaches for modifying the synthetic benchmark: Singly Synthesis, Hierarchical Synthesis and Group Synthesis. The result is that the power dissipation of Group synthesis is equally distributed without giving more loads to only one processor as compared to Hierarchical Synthesis and Singly Synthesis. Therefore, from our result we can conclude that in Group Synthesis power is equally distributed hence heat dissipation is optimized. The future work will be to further optimize the result of the Synthesis level using thread migration. Thread Migration can increase the system throughput; it relies on multiple cores that vary in performance capabilities. 11 30 2019 10089 10092 CC-BY-NC-ND 4.0 10.35940/BEIESP.CrossMarkPolicy www.ijrte.org true 10.35940/ijrte.D9552.118419 https://www.ijrte.org/portfolio-item/D9552118419/ Department of Computer Science and Engineering, KoneruLakshmaiah Education Foundation, Vaddeswaram, AP, India. Chandra Sekhar Maganty* K. Sai Prasanthi Department of Computer Science and Engineering, KoneruLakshmaiah Education Foundation, Vaddeswaram, AP, India. G. Jyothirmai Department of Computer Science and Engineering, KoneruLakshmaiah Education Foundation, Vaddeswaram, AP, India. K Harshitha Department of Computer Science and Engineering, KoneruLakshmaiah Education Foundation, Vaddeswaram, AP, India. S Harika Lakshmi Department of Computer Science and Engineering, KoneruLakshmaiah Education Foundation, Vaddeswaram, AP, India. The main goal of this project is to generate a NO FEE DUE CERTIFICATE from all departments such as Computer Center, Hostel, Library System, IRP, Placement Cell, Central Library, Alumni, HOD, Dept. Head, FED, Exam Section, Physical Education for the final years after graduating from our college. The application allows the registered user to log in and the new user is allowed to register. The application makes it convenient for registered users to apply for certificate. In today's time, we need to wait for higher authorities to sanction a request. In order to reduce the period that we use this form, the status of approval or denial of request will be notified immediately by e-mail.After all departments approve the request, the user can download a PDF, otherwise he will not be able to access it and the user will have to pay the balance due. 11 30 2019 11660 11664 CC-BY-NC-ND 4.0 10.35940/BEIESP.CrossMarkPolicy www.ijrte.org true 10.35940/ijrte.D9556.118419 https://www.ijrte.org/portfolio-item/D9556118419/