<?xml version="1.0" encoding="UTF-8"?>
<doi_batch version="4.3.0" xmlns="http://www.crossref.org/doi_resources_schema/4.3.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.crossref.org/doi_resources_schema/4.3.0 http://www.crossref.org/schema/deposit/doi_resources4.3.0.xsd">
<head>
<doi_batch_id>b89f10c5-8b3a-4341-acf2-0315ce2ca324</doi_batch_id>
<depositor>
<name>beie</name>
<email_address>director@blueeyesintelligence.org</email_address>
</depositor>
</head>
<body>
<doi_citations>
<doi>10.35940/ijrte.D6629.1110421</doi>
<citation_list><citation key="ref0"><doi>10.1109/LSENS.2021.3051259</doi><unstructured_citation>Mourad Elsobky, Ayman Mohamed, Thomas Deuble, Jens Anders, and Joachim N.Burghartz, A 12-to-15 b, 100-to-25 kS/s Resolution Reconfigurable, Power ScalableIncremental ADC using Ultra-Thin Chips, SensorsLettersVOL. 1, NO. 3, JULY 2017.</unstructured_citation></citation><citation key="ref1"><doi>10.1007/s11265-008-0326-z</doi><unstructured_citation>JOSE, Babita R., MATHEW, Jimson, et MYTHILI, P. A multi-mode sigma-delta ADC for GSM/WCDMA/WLAN applications. Journal of Signal Processing Systems, 2011, vol. 62, no 2, p. 117-130.</unstructured_citation></citation><citation key="ref2"><doi>10.4015/S1016237205000287</doi><unstructured_citation>Sheng Heng ,Chia Hung, Yi-WeiEI Shih, Chinghsingluo, DESIGNING LOW POWER OF SIGMA DELTAMODULATOR FOR BIOMEDICAL APPLICATION, HO-YIN LEE, CHEN-MING HSU, , BIOMEDICAL ENGINEERINGAPPLICATIONS,BASIS &amp; COMMUNICATIONS 2005,pp 181-185.</unstructured_citation></citation><citation key="ref3"><journal_title>IEEE Journal of Solid-State Circuits</journal_title><author>Vleugels</author><volume>36</volume><issue>12</issue><first_page>1887</first_page><cYear>2001</cYear><doi>10.1109/4.972139</doi><article_title>5 V sigma-delta modulator for broadband communications applications</article_title><unstructured_citation>Vleugels K, Rabii S, Wooley BA. A 2.5 V sigma-delta modulator for broadband communications applications. IEEE Journal of Solid-State Circuits 2001; 36(12):1887-1899.</unstructured_citation></citation><citation key="ref4"><doi>10.1109/9780470546772</doi><unstructured_citation>Schreier R, Temes GC.Understanding delta-sigma data converters. IEEE Press/Wiley: New York, 2005.</unstructured_citation></citation><citation key="ref5"><journal_title>IEEE Journal of Solid-State Circuits</journal_title><author>Maghari</author><volume>44</volume><issue>8</issue><first_page>2212</first_page><cYear>2009</cYear><doi>10.1109/JSSC.2009.2022302</doi><article_title>74dB SNDR multi-loop sturdy-MASH delta-sigma modulator using 35 dB open-loop opamp gain</article_title><unstructured_citation>Maghari N, Kwon S, Moon U. 74dB SNDR multi-loop sturdy-MASH delta-sigma modulator using 35 dB open-loop opamp gain. IEEE Journal of Solid-State Circuits 2009; 44(8):2212-2221.</unstructured_citation></citation><citation key="ref6"><doi>10.1109/ESSCIRC.2009.5326016</doi><unstructured_citation>Cornelissens K, Steyaert M. A 1-V 84-dB DR 1-MHz bandwidth cascade 3-1 delta-sigma ADC in 65-nm CMOS. In Proc. ESSCIRC, Sept. 2009; 332-335.</unstructured_citation></citation><citation key="ref7"><doi>10.1587/transele.E92.C.852</doi><unstructured_citation>Yang X, Zhang H, Chen G. A low-power second-order two-channel time-interleaved ΣΔ modulator for broadband applications. IEICE Transactions on Electronics Jun. 2009; E92-C (6):852-859.</unstructured_citation></citation><citation key="ref8"><journal_title>IEEE Journal of Solid-State Circuits Aug</journal_title><author>Lee</author><volume>44</volume><issue>8</issue><first_page>2202</first_page><cYear>2009</cYear><doi>10.1109/JSSC.2009.2022298</doi><article_title>9 MHz BW and 80 dB THD</article_title><unstructured_citation>Lee K, et al. An 8.1 mW 82 dB delta-sigma ADC with 1.9 MHz BW and 80 dB THD. IEEE Journal of Solid-State Circuits Aug. 2009; 44(8):2202-2211.</unstructured_citation></citation></citation_list>
</doi_citations>
</body>
</doi_batch>
