<?xml version="1.0" encoding="UTF-8"?>
<doi_batch version="4.3.0" xmlns="http://www.crossref.org/doi_resources_schema/4.3.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.crossref.org/doi_resources_schema/4.3.0 http://www.crossref.org/schema/deposit/doi_resources4.3.0.xsd">
<head>
<doi_batch_id>b7ba989f-5e40-42cd-a6f5-5d47647dd910</doi_batch_id>
<depositor>
<name>beie</name>
<email_address>director@blueeyesintelligence.org</email_address>
</depositor>
</head>
<body>
<doi_citations>
<doi>10.35940/ijrte.A5927.0510121</doi>
<citation_list><citation key="ref0"><doi>10.1109/ICCMC.2018.8487626</doi><unstructured_citation>RP Rao, ND Rao, K Naveen, P Ramya, &quot;Implementation of the standard floating point MAC using IEEE 754 floating point adder&quot;- 2018 Second International Conference on Computing Methodologies and Communication (ICCMC), IEEE digital library, DOI:10.1109/ICCMC.2018.8487626</unstructured_citation></citation><citation key="ref1"><doi>10.1145/225871.225877</doi><unstructured_citation>M. Pedram, &quot;Power minimization in IC design: Principles and applications&quot;, ACM Trans. Design Automation, vol. 1, no. 1, pp. 3-56, Jan. 1996.</unstructured_citation></citation><citation key="ref2"><unstructured_citation>G. Friedman, &quot;Clock distribution design in VLSI circuits: An overview&quot;, Proc. IEEE ISCAS, pp. 1475-1478, 1994-May.</unstructured_citation></citation><citation key="ref3"><unstructured_citation>E. Tellez, A. Farrah and M. Sarrafzadeh, &quot;Activity-driven clock design for low power circuits&quot;, Proc. IEEE ICCAD, pp. 62-65, 1995-Nov.</unstructured_citation></citation></citation_list>
</doi_citations>
</body>
</doi_batch>
