Implementation of LVCMOS based 4 Bit FPGA Based ALU on SP 701 Board for New Digital Age Technologies
Chandrashekhar Patel1, Abhay Saxena2, Anita Rawat3, Omprakash Nautiyal4
1Dr. Chandrashekhar Patel, Department of Computer Science, Dev Sanskriti Vishwavidyalaya, Haridwar (Uttarakhand), India.
2Prof. Abhay Saxena, Dean, School of Technology, Management & Communication, Dev Sanskriti Vishwaviidyalya, Hardwar (Uttarakhand), India.
3Prof. (Dr.) Anita Rawat, Director, Uttarakhand Science Education and Research Centre (USERC), Dehradun (Uttarakhand), India.
4Prof. Omprakash Nautiyal, Uttarakhand Science Education & Research Centre (USERC) Dehradun (Uttarakhand), India.
Manuscript received on 24 February 2023 | Revised Manuscript received on 14 March 2023 | Manuscript Accepted on 15 March 2023 | Manuscript published on 30 March 2023 | PP: 102-110 | Volume-11 Issue-6, March 2023 | Retrieval Number: 100.1/ijrte.F74980311623 | DOI: 10.35940/ijrte.F7498.0311623
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Objectives: The 4-bit ALU of a RISC processor is designed as shown by the researcher in this paper. The 4-bit ALU used in this work can perform 24 = 16 various arithmetic and logical operations, including addition, subtraction, multiplication, and division as well as logical AND, OR, NAND, NOR, NOT, XOR, XNOR, INCREMENT, DECREMENT, ROTATE LEFT, and ROTATE RIGHT. Methods: The author used the Vivado simulation tools with the Verilog HDL language to build the FPGA-based ALU, and the SP701 Spartan FPGA board was used to implement the entire design. It has been implemented to use energy-efficient IO standard approaches. Findings: By calculating the overall power usage at the pre- and post-levels, this research has developed a new method for building energy-efficient FPGA-based ALUs. Author utilized Vivado simulation tool for this investigation. The SP701 FPGA board has also been used to implement this idea. Novelty: The Internet of Things and other emerging digital era technologies will undoubtedly benefit from this research work, and its energy efficient design will support environmental initiatives.
Keywords: SP701, FPGA, VIVADO, RISC, LVCMOS, Verilog
Scope of the Article: FPGAs