Optimization of Multiplier Design in FIR Filters
D. Sivakumar1, J.Gurumurthy2, B.Balan3, Thiyakaraj S. V4, Sriram S5, Syed Afeef Ahmed6
1D. Sivakumar, Department of ECE, Easwari Engineering College Chennai (Tamil Nadu), India.
2J.Gurumurthy, Department of ECE, Easwari Engineering College Chennai (Tamil Nadu), India.
3B. Balan, Department of ECE, Easwari Engineering College Chennai (Tamil Nadu), India.
4Thiyakaraj S. V, Department of ECE, Easwari Engineering College Chennai (Tamil Nadu), India.
5Sriram S, Department of ECE, Easwari Engineering College Chennai (Tamil Nadu), India.
6Syed Afeef Ahmed, Department of ECE, Easwari Engineering College Chennai (Tamil Nadu), India.
Manuscript received on 05 May 2019 | Revised Manuscript received on 17 May 2019 | Manuscript Published on 23 May 2019 | PP: 527-530 | Volume-7 Issue-6S5 April 2019 | Retrieval Number: F10920476S519/2019©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: To optimize the performance of transmitter and receiver circuits in communication, FIR filters play major role in many areas such as noise suppression, bandwidth selection and so on. During the realization of digital FIR filters, multipliers play a major role in processing digital signals. Performance of many arithmetic problems mainly depends on the speed at which a multiplication operation can be performed. So by changing the method of acquisition of partial products can produce change in speed, time and usage of area. From the study, multiplier design with Wallace tree structure is efficient at higher orders in comparison with array multiplier in both power and speed. Replacing array multiplier by Wallace tree multiplier in digital FIR filter contributes towards the attributes of VLSI DESIGN. The FIR filter with Multiplier functionality checking was done in MODELSIM and synthesis is done in Xilinx ISE.
Keywords: Array Multiplier, Wallace Tree Multiplier, FIR Filter, Model Sim, Xilinx ISE.
Scope of the Article: Microstrip Antenna Design and Application