Design of RF LNA with Resistive Feedback and Gain Peaking for Multi-Standard Application
S. Radha1, D. S. Shylu2, P. Nagabushanam3, J. Sunitha Kumari4
1S. Radha, Department of Electronics and Communication Engineering, Karunya University, Coimbatore (Tamil Nadu), India.
2D. S. Shylu, Department of Electronics and Communication Engineering, Karunya University, Coimbatore (Tamil Nadu), India.
3P. Nagabushanam, Department of Electronics and Electrical Engineering, Karunya University, Coimbatore (Tamil Nadu), India.
4J. Sunitha Kumari, Department of Electronics and Communication Engineering, TKR College of Engineering & Technology, Hyderabad (Telangana), India.
Manuscript received on 24 September 2018 | Revised Manuscript received on 30 September 2018 | Manuscript published on 30 November 2018 | PP: 100-108 | Volume-7 Issue-4, November 2018 | Retrieval Number: E1807097418©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Low Noise Amplifier (LNA) for 2.4 GHz is the leading block in RF to enhance the performance of the receiver. LNA used in video applications, satellite communications at RF front end of the receiver. Linearity is one of the key requirements for designing LNA, because LNA must exhibit linear operation in the presence of large interfering signals. Some of the existing techniques which improves linearity are Noise cancellation, Derivative superposition, Modified DS technique, body biasing, optimum gate biasing, MGTR, feed forward. The existing challenge in designing a LNA circuit is to achieve high gain, low noise figure and with low power usage without affecting its linearity. This paper analyses variety of linearization techniques that are used for CMOS Low Noise Amplifier (LNA). The LNA methods include (1) single ended LNA (2) PD-LNA (3) capacitive feedback (4) Current-Reuse. We also proposed a Resistive feedback & Gain Peaking technique for LNA using gated inductor at transistor to obtain high gain with low power consumption. Using variety of linearization techniques, the LNA circuits had been designed at 90nm CMOS technology in cadence virtuoso. The resistive feedback and gain peaking LNA gives a gain of 25.4dB with low power consumption of 3.4mv which is better compared to other existing linearization techniques.
Keywords: low noise amplifier (LNA), noise figure (NF), single ended LNA, resistive feedback, capacitive feedback, post distortion linearization technique (PD-LNA), current reuse technique.
Scope of the Article: Software Engineering Techniques and Production Perspectives