Design of 9-T QSTCAM using LECTOR Low Power Technique in 45nm CMOS Technology
S Aruna1, K. Sravan2, K. Srinivasa Naik3
1S Aruna, Department of ECE, Andhra University College of Engineering (A), Visakhapatnam (Andhra Pradesh), India.
2K. Sravan, Department of ECE, Andhra University College of Engineering (A), Visakhapatnam (Andhra Pradesh), India.
3K.Srinivasa Naik, Vignan’s Institute of Information Technology (A), Visakhapatnam (Andhra Pradesh), India.
Manuscript received on 14 February 2019 | Revised Manuscript received on 05 March 2019 | Manuscript Published on 08 June 2019 | PP: 328-334 | Volume-7 Issue-5S4, February 2019 | Retrieval Number: E10700275S419/19©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Hardware search engine constitutes of an important role to enhance the speed of the process towards search of the high speed appliances. TCAM is that sort of a hardware which completes the search cycle in a single clock and it uses different mask storage and content storage. A 128*32 bit TCAM is implemented with selective match line evaluation scheme in predictive 45nm CMOS process and in this paper a TCAM is designed using LECTOR low power technique.
Keywords: TCAM, LECTOR, 45nm CMOS Process.
Scope of the Article: Low-power design