Digitalized Synchronization of Multi level STATCOM with Switch Fault Elimination
K.Varalakshmi1, R.L.Narasimham2, G.Tulasiramdas3
1K.Varalakshmi,ResearchScholar, EEE, Aditya college of Engg. & Tech, JNTUK, Kakinada, India.
2R.L.Narasimham, Professor,EEE department, Andhra University(Retd), Visakhapatnam, India.
3G.Tulasiramdas, Professor, EEE department, JNTU-Hyderabad, India.
Manuscript received on November 12, 2019. | Revised Manuscript received on November 23, 2019. | Manuscript published on 30 November, 2019. | PP: 8271-8275 | Volume-8 Issue-4, November 2019. | Retrieval Number: D8942118419/2019©BEIESP | DOI: 10.35940/ijrte.D8942.118419
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: With much advancement in the FACTS technologies STATCOM with multi-level inverter provides reactive compensation with less harmonics injection in the grid system. The voltage stress on each power electronic switch is also reduced as the voltage across each switch is low, in turn reduces the switching losses. In this paper a cascaded multi-level inverter with STATCOM application of 2m+1 levels controlling through Space Vector PWM was considered. Switch fault analysis is carried out by detecting and mitigating the fault with a bypass power electronic switch. Design method and parametric analysis is carried out in MATLAB simulation and results arevalidated.
Keywords: STATCOM- Static Synchronous Compensator, Switch Fault Analysis, SVPWM- Space Vector Pulse Width Modulation, Harmonic Reduction.
Scope of the Article: Predictive Analysis.