Design of a Floating Gate Synapse Simulation Model
Garima Kapur
Dr Garima Kapur, Assistant Professor (Senior grade), Electronics and Communication Department, Jaypee Institute of Information and Technology, A-10, Sector 62, NOIDA, UP, India.
Manuscript received on 19 August 2019. | Revised Manuscript received on 24 August 2019. | Manuscript published on 30 September 2019. | PP: 6351-6356 | Volume-8 Issue-3 September 2019 | Retrieval Number: C6116098319/19©BEIESP | DOI: 10.35940/ijrte.C6116.098319
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Proposing a simulation model of Floating-gate (FG) MOSFET whose characteristics when operated at sub-threshold conduction are like a synapse of brain. It can store, program, and adapt information (charge). The model consists of empirical equations and its parameter values have been extracted from fabricated results. The post fabrication programming of charge at the FG have been observed using two quantum-controlled processes (Fowler Northeim tunneling & hot electron injection) with the help of externally applied voltages, which in turn program FGMOS characteristics like threshold voltage, Vth. The programming is non-volatile and stable with changing temperature (4μV/°C) and noise. The Vth programming range is varied by more than 7V to 8V of its original value with very high bit (about 13-bit) of programming precision/resolution. The model layout/mask consume maximum of 130×90 μm2 of chip area and average power consumed by model is around 0.315mW. This verified FG simulation model can introduce the concept of on-chip tuning ability, programming ability, reconfiguring ability in precision analog signal processing designs like inductor, filters, controller circuits, voltage-controlled oscillators, etc. On adding adequate feedback mechanism to FGMOS model, it shows self-adaption of FG charge, which can be used to emulate features of a neuron/synapse in CMOS based neuromorphic circuits emulating several cognitive behaviors of human brain like Winner takes all circuits, circuits generating spikes (STDP), etc.
Keywords: Fowler-Northeim Tunneling, Neuron, Injection, Non-conventional MOSFETs, Synapse, Post-fabrication Programming.
Scope of the Article: Computer Graphics, Simulation, and Modelling