A Reduced Switch Count Seven Level Symmetrical Inverter with Low Distortion
Vanumu Balaji1, U. Subha2, G Joga Rao3
1Mr. V Balaji*, Pursuing M Tech, Department of Power Electronics, Raghu Institute of Technology, Visakhapatnam (Andhra Pradesh), India.
2Mrs. Uppili Subha, Assistant Professor, Department of EEE, Raghu Institute of Technology, Visakhaptanam (Andhra Pradesh), India.
3Dr. G Joga Rao, Assistant Professor, Department of EEE, Raghu Institute of Technology, Visakhapatnam (Andhra Pradesh), India.
Manuscript received on May 29, 2021. | Revised Manuscript received on July 26, 2021. | Manuscript published on July 30, 2021. | PP: 181-186 | Volume-10 Issue-2, July 2021. | Retrieval Number: 100.1/ijrte.B60320710221| DOI: 10.35940/ijrte.B6032.0710221
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Various types of new structures in multilevel inverters are evolving day by day. One among those is the reduced switch count type multilevel inverters. This inverter consists of low number of switches, gate driver components, and other switches like auxiliary switches. Depending on the value of the voltage sources we have symmetrical and asymmetrical multilevel inverters. In this paper, the seven level symmetrical inverter design is shown for seven levels in its output. The output voltage waveform is plotted and its FFT is performed and the THD values are shown. The inverter is simulated in SIMULINK software. Index Terms: Seven level MLI, inverter, and Modular Inverter.
Keywords: THD, FFT, Distortion factor.