Research on IEEE 754 Standard Single Precision Floating Point Multipliers Designed using Urdhva Triyagbhyam Sutra of Vedic Mathematics
Sai Venkatramana Prasada G S1, G Seshikala2, Niranjana S3

1Sai Venkatramana Prasada G S, Research Scholar, Assistant Professor, Department of E&C, Srinivas University, Mangaluru, Reva University, Bengaluru (Karnataka), India.
2Dr. G Seshikala, Professor, Department of E&C, Reva University, Bengaluru (Karnataka), India.
3Dr. Niranjana S, Associate Professor Senior Scale, MIT, MAHE, Manipal (Karnataka), India.
Manuscript received on 17 October 2019 | Revised Manuscript received on 25 October 2019 | Manuscript Published on 02 November 2019 | PP: 2990-2993 | Volume-8 Issue-2S11 September 2019 | Retrieval Number: B13820982S1119/2019©BEIESP | DOI: 10.35940/ijrte.B1382.0982S1119
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Abstract: EDuplication of the coasting element numbers is the big activity in automated signal handling. So the exhibition of drifting problem multipliers count on a primary undertaking in any computerized plan. Coasting factor numbers are spoken to utilizing IEEE 754 modern day in single precision(32-bits), Double precision(sixty four-bits) and Quadruple precision(128-bits) organizations. Augmentation of those coasting component numbers can be completed via using Vedic generation. Vedic arithmetic encompass sixteen wonderful calculations or Sutras. Urdhva Triyagbhyam Sutra is most usually applied for growth of twofold numbers. This paper indicates the compare of tough work finished via exceptional specialists in the direction of the plan of IEEE 754 ultra-modern-day unmarried accuracy skimming thing multiplier the usage of Vedic technological statistics.
Keywords: Floating Component Multiplier, Unmarried Accuracy, Sutra, Urdhva Triyagbhyam, Vedic Arithmetic.
Scope of the Article: Standards for IoT Applications