High-Resolution DPWM for DC-DC Buck Converter using Sigma-Delta Modulation Techniques
Shubha Rao K1, Veena S Chakravarthi2
1Shubha Rao K, Department of Electrical & Electronics Engineering, B.N.M Institute of Engineering, Bengaluru (Karnataka), India.
2Veena S Chakravarthi, Department of Electrical & Electronics Engineering, B.N.M Institute of Engineering, Bengaluru (Karnataka), India.
Manuscript received on 20 August 2019 | Revised Manuscript received on 11 September 2019 | Manuscript Published on 17 September 2019 | PP: 1205-1209 | Volume-8 Issue-2S8 August 2019 | Retrieval Number: B10390882S819/2019©BEIESP | DOI: 10.35940/ijrte.B1039.0882S819
Open Access | Editorial and Publishing Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper, a 13-bit hybrid DPWM structure which consists of a second-order Σ-∆ modulator having 6-bit resolution and a counter-comparator block with the 7-bit resolution is designed. The Σ-∆ modulator is based on error feedback concept which increases the effective resolution of DPWM by 6-bit and at the same time reduces clock power requirements and noise disturbances. The timing simulation waveforms of the designed DPWM architecture are verified and PWM pulses of the desirable duty cycle are generated. The Σ-Δ modulator based DPWM is used to drive the power MOSFETs of switching buck converter and Inductor current output voltage waveforms are observed. Ripple quantities of 17.5% and 0.07% are obtained for Inductor current and output voltage which are within the upper limits of 20% and 1% respectively. The steady value of the output voltage obtained is 0.99955V. The result obtained validates the Hybrid DPWM design.
Keywords: Buck Converter, Digital Control, Sigma-Delta Modulator, High Resolution.
Scope of the Article: High Performance Computing