The Hardware Design and Implementation of a Key Exchange Protocol for Low-cost IoT Devices
Dennis Agyemanh Nana Gookyi1, Kwangki Ryoo2
1Dennis Agyemanh Nana Gookyi, Department of Information and Communication Engineering, Hanbat National University, Daejeon, South Korea.
2Kwangki Ryoo, Department of Information and Communication Engineering, Hanbat National University, Daejeon, South Korea.
Manuscript received on 17 August 2019 | Revised Manuscript received on 27 August 2019 | Manuscript Published on 16 September 2019 | PP: 79-85 | Volume-8 Issue-2S6 July 2019 | Retrieval Number: B10160782S619/2019©BEIESP | DOI: 10.35940/ijrte.B1016.0782S619
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The General Data Protection Regulation (GDPR) which was enforced in May 2018 clearly stated that the protection of data by organizations is a mandatory task. Protecting or securing data on data collecting and sensing devices used in the Internet-of-Things (IoT) platform is a challenge for the fact that the devices are resource-constrained in terms of operation frequency, hardware area, computational complexity, and power consumption. The first step to securing data on low-cost IoT devices is to generate keys for subsequent encryption and authentication. This paper, therefore, proposes and implements a lightweight key exchange protocol with the capability of authenticating the generated key without the need for public-key cryptography. The protocol is meant to be simple and make use of minimal hardware resources. It uses components such as the pseudorandom number and bit generators, dot product, XOR gates, shift registers and basic logic gates making it very resource-efficient. The hardware architecture of the protocol was implemented using Verilog Hardware Description Language (HDL) and synthesized using Xilinx ISE 14.7 software which includes XPower Analyzer for power estimation. The protocol was tested on a Field Programmable Gate Array (FPGA) board with a synthesizable Reduced Instruction Set Computer Five (RISC-V) processor core. The synthesis and simulation results which include area, maximum frequency, latency, and power consumption show that the protocol is suitable for IoT low-cost devices as compared to standard public-key primitives.
Keywords: Hardware Design, IoT, Key Exchange Protocol, Low-cost Devices, RISC-V, Synthesizable Processor.
Scope of the Article: IoT