Fault Analysis of 3to 8 Decoder implemented using Quantum Dot Cellular Automata for State Configuration
R. Jayalakshmi1, M. Senthil Kumaran2
1R. Jayalakshmi, Research Scholar/Department of Engineering and Communication Engineering Sri Chandrasekharendra Saraswathi Viswa Maha Vidyalaya, Enathur- 631561, Kanchipuram, (Tamil Nadu), India.
2M. Senthil Kumaran, Associate Professor/Department of Computer Science Engineering, Sri Chandrasekharendra Saraswathi Viswa Maha Vidyalaya, Enathur- 631561, Kanchipuram, (Tamil Nadu), India.
Manuscript received on 21 April 2019 | Revised Manuscript received on 25 May 2019 | Manuscript published on 30 May 2019 | PP: 1766-1769 | Volume-8 Issue-1, May 2019 | Retrieval Number: A1854058119/19©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: As the Complementary Metal oxide Semiconductor Field effect transistor has reached its limits of further increase in the device density as Per Moore’s law, there are alternate technologies like the Carbon Nano tube Field effect Transistor, Quantum Computing gates, Spintronics, Quantum Dot Cellular Automata(QCA), of which QCA has the advantages of high device density, improvised latency and less power consumption. Hence there is need for design of QCA circuits as well as testing of such circuits for various defects. In this research we have focused on the Fault analysis of a 3 to 8 Decoder constructed using Five input Majority Voter with Coplanar Wire crossing. The Framework provided is to detect the fault occurring at the QCA configurations and fault injection is performed to estimate the error rate in QCA Circuits.
Keywords: Quantum Dot Cellular Automata, Struck at Faults, Decoder.
Scope of the Article: Analysis of Algorithms and Computational Complexity