Design of Low Power Multiplexer and De-Multiplexer using Different Adiabatic Logics
M. Swathi1, A.V.N.S Lasya Priya2, Lokesh Pudari3, Kura Karthik4
1M. Swathi*, Department of Electronics and Communication Engineering, VBIT, JNT University, Hyderabad, India.
2A.V.N.S Lasya Priya, Department of Electronics and Communication Engineering, VBIT, JNT University, Hyderabad, India.
3Lokesh Pudari, Department of Electronics and Communication Engineering, VBIT, JNT University, Hyderabad, India.
4Kura Karthik, Department of Electronics and Communication Engineering, VBIT, JNT University, Hyderabad, India.
Manuscript received on April 02, 2020. | Revised Manuscript received on April 16, 2020. | Manuscript published on May 30, 2020. | PP: 465-473 | Volume-9 Issue-1, May 2020. | Retrieval Number: A1623059120/2020©BEIESP | DOI: 10.35940/ijrte.A1623.059120
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper we proposed, design and evaluation of 16:1 Multiplexer and 1:16 Demultiplexer using different adiabatic logics. Power consumption is the main factor in VLSI digital circuit design. Here we have introduced a CMOS-logic based 16:1 Multiplexer and 1:16 De-multiplexer with a low power adiabatic logic. In which we concentrate on the characteristics of the CMOS and adiabatic logics such as 2N2P, 2N-2N2P and Dual sleep. Wherein both 2N2P and 2N2N2P use a cross-coupled transistor structure for adiabatic operation. Adiabatic logic circuits use reverse logic and the power dissipation will be less compared to the CMOS circuits as the inputs are given to the n-type functional tree in 2N2P and 2N2N2P. For dual sleep logic an additional circuit is connected in series with general CMOS circuit known as sleep circuit. we have concentrated on energy recovery and power dissipation, as all these technique results in the low power dissipation. Dualsleep is considered as the best of the all the other adiabatic and traditional logics.
Keywords: Low Power Dissipation, Energy Recovery, 2N2N2P Logic, 2N2P Logic, Dualsleep Logic.
Scope of the Article: Building Energy