Design and Implementation of Modified Booth Encoder Multiplier using Carry Select Adder
K. Jeswanth Singh1, B. Vamsi Krishna2
1K. Jeswanth Singh, Department of Electronics and Communication (M.Tech Student), Kakinada University, Gudlavalleru Engineering College, Gudlavalleru,(Andhra Pradesh), India.
2B. Vamsi Krishna, Department of Electronics and Communication (Lecturer), Kakinada University, Gudlavalleru Engineering College, Gudlavalleru, (Andhra Pradesh), India.
Manuscript received on 20 November 2014 | Revised Manuscript received on 30 November 2014 | Manuscript published on 30 November 2014 | PP: 11-14 | Volume-3 Issue-5, November 2014 | Retrieval Number: E1236113514/2014©BEIESP
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Abstract: Booth encoded Multiplier is used to reduce the hardware utilization in chip level designing in VLSI projects. The present project is focusing on designing and developing a powerful Booth encoded multiplier integrated with Carry Select Adder [CSLA]. Primarily the on hand Booth encoding multiplier is used in multiplication operations based on signed numbers only. The multipliers such as braun array multiplier and array multiplier are used for multiplication operation which is based on unsigned number. There is no specific method to do the multiplication operations based on signed and unsigned numbers. The current project is focusing on design and development of a novel booth multiplier which is enhanced with signed bit operands to produce half the partial products in parallel. Current paper is also concentrating to increase the speed of the multiplier operations by using a method called Carry Select Adder. The use of these integrated technologies is going to reduce the time for multiplication of signed and unsigned numbered operations. The original or modified Booth Encoder Multiplier with Carry Select Adder aims at utilize minimum hardware, reduced chip area, low power dissipation and reduced cost of system.
Keywords: Carry Select Adder [CSLA], Modified Booth Multiplier, Xilinx, verilog,
Scope of the Article: Machine Design