Design of Low Power, High Gain Fully Differential Folded Cascode Operational Amplifier for Front End Read Out Circuits
Gaurav Sharma1, Sushma Reddy2, Anil Kumar Bhardwaj3, Arvind Rehalia4, Sumeet Gupta5, Amit Kant Pandit6
1Gaurav Sharma, School of Electronics & Communication,Shri Mata Vaishno Devi University,Katra, J&K, India.
2Sushma Reddy, Bharti Vidya Peeth College of Engineering , New Delhi, India.
3Anil Kumar Bhardwaj, School of Electronics & Communication,Shri Mata Vaishno Devi University,Katra, J&K, India.
4Arvind Rehalia, Bharti Vidya Peeth College of Engineering , New Delhi, India.
5Sumeet Gupta, School of Electronics & Communication,Shri Mata Vaishno Devi University, Katra, J&K, India.
6Amit Kant Pandit, School of Electronics & Communication,Shri Mata Vaishno Devi University, Katra, J&K, India.
Manuscript received on November 15, 2019. | Revised Manuscript received on November 23, 2019. | Manuscript published on November 30, 2019. | PP: 1802-1808 | Volume-8 Issue-4, November 2019. | Retrieval Number: C6189098319/2019©BEIESP | DOI: 10.35940/ijrte.C6189.118419
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: The Front end read out circuits are major block in the implementation of Capacitive MEMS accelerometer. Front end read-out circuits comprises of preamplifier block containing folded cascode fully differential operational amplifier which are required for the signal conditioning of the signals received from the MEMS sensors. The op-amps are prime elements in design and implementation of mixed signal integrated circuits. The high gain and low power of the designed circuits helps in the designing of high precision IC’s for numerous application. Amongst the available topologies folded cascode topology plays vital role in the design and development of low power, high gain read out circuits. This paper illustrates the design and analysis of low power, high gain fully differential Folded Cascode Operational Amplifier for front end read out circuits. The designed op-amp exhibits a power consumption or dissipation of 92.14 μW and relatively higher open loop DC gain value with a value calculated at 81.33 dB by employing folded cascode topology. The UGB and Phase Margin for the selected design are 35 MHz and 83.60 respectively. The design operates at 5V power supply with the bias current of 12.11 μA. The circuit design and simulations have been implemented using 0.18 μm CMOS technology.
Keywords: Folded Cascode, Operational Amplifier, Gain, PM, UGB, Front End Read Out Circuits And MEMS Accelerometer.
Scope of the Article: Low-power Design.