Low-Power Adiabatic Computing with Modified Quasi Static Energy Recovery Logic of MQSERL 4×4 multiplier
M.Mailsamy1, V. Rukkumani2, K. Srinivasan3, B. Sharmila4
1Mayilsamy M, Dept. of Electronics and Communication, CMS College of Engineering and Technology, Coimbatore, India.
2Rukkumani V, Dept. of Electronics and Instrumentation Engineering, Sri Ramakrishna Engineering College, Coimbatore, India.
3Srinivasan K, Dept. of Electronics and Instrumentation Engineering, Sri Ramakrishna Engineering College, Coimbatore, India.
4Dr.B. Sharmila, Assistant Professor (Sr.G) in the Department of Electronics and Instrumentation Engineering at Sri Ramakrishna Engineering College, Coimbatore
Manuscript received on 02 March 2019 | Revised Manuscript received on 06 March 2019 | Manuscript published on 30 July 2019 | PP: 1896-1901 | Volume-8 Issue-2, July 2019 | Retrieval Number: B1736078219/19©BEIESP | DOI: 10.35940/ijrte.B1736.078219
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: This work depends on another methodology for limiting vitality utilization in semi static vitality recuperation rationale of Modified Quasi Static Energy Recovery Logic (MQSERL) circuit which includes enhancement by expelling the non-adiabatic misfortunes totally. Vitality recouping hardware dependent on adiabatic standards is a promising system driving towards low power superior circuit plan. The productivity of such circuits might be expanded by lessening the adiabatic and non-adiabatic misfortunes drawn by them amid the charging and recuperation tasks. In this paper, execution of the proposed rationale style is broke down and contrasted and CMOS in their agent inverters, entryways, flip- flop and snake circuits. Every one of the circuit was reproduced by test system of TANNER TOOL in 0.18μm innovation. In our proposed inverter the vitality proficiency has been enhanced to practically 30% and 20% up to 20MHz and 20fF outside load capacitance in contrast with CMOS and MQSERL circuits individually. Our proposed circuit gives vitality proficient execution up to 100 MHz and in this way it has ended up being utilized in superior VLSI hardware.
Index Terms: Component; Adiabatic Logic; Power Consumption; Quasi Static Energy Recovery Logic (QSERL); CMOS logic.
Scope of the Article: Cloud Computing