RTL Design of Efficient High-Speed Adders Using Quantum-Dot Cellular Automatation
P. Gayathri1, R. Mohan Kumar2
1P. Gayathri, Associate Professor, TKRCET, Medbowli, Saroor Nagar, Hyderabad (Telangana), India.
2Dr. R. Mohan Kumar, Professor, SSSUTMS, Sehore, Bhopal (M.P), India.
Manuscript received on 17 October 2019 | Revised Manuscript received on 25 October 2019 | Manuscript Published on 02 November 2019 | PP: 2853-2857 | Volume-8 Issue-2S11 September 2019 | Retrieval Number: B13550982S1119/2019©BEIESP | DOI: 10.35940/ijrte.B1355.0982S1119
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: This article presents the design of high-speed adders using Quantum cellular automata. Quantum Automata is an efficient evaluation platform than CMOS in nanotechnology. Power, surface and performance play a virtual role in nanotechnology. Quantum Automata is an emerging technology in nanotechnology. QCA provides more speed, less power consumption and large scale integration in VLSI. By using Quantum-Dot cellular automata, we can reduce the power of leaks. Generally, for transferring the data and store data, electric fields are used in CMOS technology but in QCA, storing the data and transfer the data done by electronic polarization. This article presents different combinational logic circuits depend on QCA technology. The proposed modified CSLA (carry select adder) offer the best results of delay compared to the Ripple carry adder (RCA).
Keywords: QCA, Leakage Power, Modified Carry Selection Adder, RCA, Majority Gate.
Scope of the Article: High Speed Networks